EPM7064LC687
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Altera
Mpn
EPM7064LC687
Datenblatt
Beschreibung
CPLD MAX 7000 Family 1.25K Gates 64 Macro Cells 166.7MHz CMOS Technology 5 Volt 68-Pin PLCC
Technische Daten: EPM7064LC687
China RoHS
Non-Compliant
Lead Free
Contains Lead
Radiation Hardening
No
REACH SVHC
Yes
RoHS
Non-Compliant
Height
3.81 mm
Height - Seated (Max)
5.08 mm
Length
24.2316 mm
Terminal Pitch
1.27 mm
Width
24.2316 mm
Case/Package
PLCC
Mount
Surface Mount
Number of Pins
68
Number of Terminals
68
Lifecycle Status
Obsolete (Last Updated: 5 months ago)
Clock Rate
166.7 MHz
Frequency
166.7 MHz
Max Frequency
151.5 MHz
Max Operating Temperature
70 °C
Max Supply Voltage
5.25 V
Memory Type
EEPROM
Min Operating Temperature
0 °C
Min Supply Voltage
4.75 V
Number of Gates
1250
Number of I/Os
52
Number of Inputs
52
Number of Logic Blocks (LABs)
4
Number of Logic Elements/Cells
4
Number of Macrocells
64
Number of Outputs
52
Number of Programmable I/O
52
Operating Supply Voltage
5 V
Propagation Delay
7.5 ns
Speed Grade
7
Turn-On Delay Time
7.5 ns
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